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The MM-6230D main
board is a high density memory module that
provides 4M, 8M, 12M, or 16MB. The memory module
is completely compatible with the VMEbus and
supports A32/A24, D32/D16/D8, byte, word, long
word, unaligned bus transfer (UAT) and
Fast-Write cycles. It also supports sequential
access block mode transfers (BLT) of 256 bytes.
Module selection is on 64KB boundaries, whose
upper and lower limits are switch-selectable. To
simplify reprogramming, address modifiers are
programmed and decoded in a socketed IFL. Parity
generation and checking are provided for each
byte. Parity status is stored and transmitted
via BERR* signal. If the BERR* signal is
asserted, the DTACK* signal is inhibited during
memory read operations. Reliability is ensured
by burn-in and running memory diagnostics that
check operation for 48 hours while
temperature-cycling boards from 0 to 60°C. |